The present invention is directed to integrated circuits and, more particularly, to a digital signal processor (DSP) with a direct memory access (DMA) controller that processes data transferred by the DMA controller.
A DSP can be used for processing signals such as audio, video, meter and sensor output signals, and for voice recognition, for example. Often the input signal is an analog signal that is converted to a digital input to the DSP by an analog-to-digital converter (ADC). The digital output of the DSP may be converted back to an analog signal using a digital-to-analog converter (DAC). A DSP may be less specialized, commonly called a microprocessor, or more specialized, commonly called a microcontroller (MCU), and may be formed as a single integrated circuit (IC) or may have more than one semiconductor chip.
A conventional DSP often comprises a central processor unit (CPU), main system memory including random access memory (RAM), and a direct memory access (DMA) controller. If the CPU itself performs read and write programmed input/output (I/O) transfer operations between a source and a destination involving the main system memory, its processing capacity is unavailable for processing tasks while it performs the I/O transfers. Typical DMA controllers perform hardware data transfers between a source memory address and a destination memory address without processing by the CPU. The CPU initiates the transfer, specifying the source and destination address of the data to be transferred, and then the CPU is free to perform other processing tasks until the DMA controller sends an interrupt to the CPU signaling that the I/O operation is complete. Conventional DMA controllers are unable to modify the data being transferred from the source to the destination address. That is, the data are just copied from source to destination.
A conventional DSP can include specialized hardware units that execute a pre-defined list of instructions selected by the CPU on input data, store the output result and notify the CPU, for example by an interrupt signal. However, such specialized hardware units add to the complexity of the DSP.
It would be advantageous to reduce the processing load of the CPU with minimal complexity of the DSP.